The Performance Chasers and The Case of The Multi-Core Processor

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In the video processing world we are all performance chasers. Just like “ambulance chasers” us video processing guys are making a living from victims of disasters, applications that needed video but couldn’t afford it, applications that thought there is “too much processing power“.

On one hand, the world went from SD to HD in just a few months, and suddenly the bigger the better. On the other hand, Tsahi has already discussed how CPUs today fail to deliver in terms of processing power.  A lot of industry people are predicting that Moore’s law will come to an end sometime in the next decade. In fact, if the semiconductor industry did maintain Moore’s law, we would see today 15GHz processors, but “no one knows how to design a 15-GHz processor“.


Moore’s Law at the Intel museum. (CC)

The Multi-Core Revolution

The solution that the chip industry has found for to the processing power problem is the multi-core chip. As semiconductor vendors tackle physical limits in the manufacturing of more powerful CPUs (especially heat dissipation and data synchronization), multi-core CPUs can increase the overall parallelism (instruction-level and thread-level) for a given available real-estate.

Shared memory multi-CPU systems are not a new thing. In fact, they have been around since the 1960s (The Burroughs’ D825 was, according to scholars, the first true multi-processor computer). From the mid 90s leading vendors, from both the general purpose processors market (GPPs) and the embedded market (DSPs), released their version of a shared-memory multi-core chips, including Texas instruments, Freescale, IBM and Intel.

In addition to the symmetric multi-core processors, where all cores are the same, there has been a lot of work from various vendors with System-on-Chip solutions that offer multi-processor platforms. A good example is TI’s “DaVinci HD”, or TM6467, which is the platform of choice for RADVISION’S BEEHD video engine. This SoC, for instance, is a combination of an ARM9 processor, a TI C64+ DSP core, HD co-processors (HD-VICP) and more, each with its own unique set of capabilities.

RADVISION’s BEEHD Client Hardware Architecture.

Multi-Core, Multi-challenge

But while having multiple cores, or even many cores (tens, hundreds or thousands of cores), allows for multiple capabilities, much more than we are used to, much more than we even need at this moment, it also bring many obstacles. The recent “Multi-core day” I attended in the Technion was devoted to these challenges, most of which are related to the new software design, programming and debugging practices that must be adopted.

Designing and writing “great code” is the ultimate goal for every software developer. However for us “performance chasers” “great code” is not about maintaining code convention or cross-platform compatibility. It is squeezing the most from our processor, and so code optimization becomes a great part of our work, whether we like it or not.

Designing and writing code for multi-core processors is not trivial, and is a totally different ball game than that of single-core processors. In fact, in light of this, and the fact that multi-core processors are happening today (not to mention, will become the future), many across the industry and academy, in the “multi-core day” as well as in leading vendors such as Intel and IBM, believe that we should already include multi-core programming in every programmer’s training.

And we’re already there, says Selwyn H. You from Intel:

“It’s good to see the education industry has started to follow the trend – the number of universities that teach parallel programming to take performance gain reaches 1000 world-wide. Will it be more difficult to insert those performance bit into the current curricula?”

Yossi Cohen argued here a few weeks ago against optimizing and for innovation. I agree. But designing tomorrow’s video processing systems, such as HD endpoints and conference bridges, around multi-core processors, is innovation. Sure, it involves a great deal of optimization, but most of it is by design. Most if it is in the innovation itself.

If we are to beat Moore’s law, if we are to provide customers with real HD experience, we must harvest the power given to us by multi-core platforms. We must, as there is no such thing as enough processing power. We must, as – after all – we are The Performance Chasers.

Sagee Ben-Zedeff

Director of product management, heading video solutions at RADVISION's Technology Business Unit. Visual communications evangelist and video technologies expert. I blog therefore I am.
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